Meta AR/VR Job | ASIC Engineer, Design
Job（岗位）: ASIC Engineer, Design
Type（岗位类型）: Engineering
Citys（岗位城市）: Sunnyvale, CA
Date（发布日期）: 2023-5-28
Summary（岗位介绍）
Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video transcoding and network acceleration. We are looking for talented individuals with deep experience that span one or more of the key areas required to build successful world-class complex SoC and IP for data center applications.
Qualifications（岗位要求）
Bachelor’s degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
5+ years of experience in micro-architecture and RTL development for complex control and data path IPs OR Experience in SoC Micro-architecture, Design and Integration.
Description（岗位职责）
Architecture exploration.
Micro-architecture development.
RTL development using Verilog, System Verilog and HLS.
Soft and hard IP configuration and integration.
Collaboration with verification and emulation teams in test plan development and debug.
Collaboration with implementation team to close the design on timing and power.
Additional Requirements（额外要求）
Experience in data path development.
Experience with Synthesis and Timing Closure.
