Meta AR/VR Job | ISP Architect
Job（岗位）: ISP Architect
Type（岗位类型）: Engineering | Hardware
Citys（岗位城市）: Sunnyvale, CA
Redmond, WA
Austin, TX
Remote, US
Date（发布日期）: Before 2021-12-14
Summary（岗位介绍）
Facebook AR/VR focuses on delivering Facebook’s vision through Augmented Reality (AR) and Virtual Reality (VR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. Facebook Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR and VR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistor, through architecture, to firmware, and algorithms.
Imaging Architecture Engineers in our Silicon team are developing algorithms, silicon architecture, authoring bit accurate specifications and C code simulations. Working hands in hand with the chip designer. A strong candidate would master at least one of the disciplines (algorithms/chip design) and proficient in the other.
This is a full-time position based in Menlo Park, CA.
Qualifications（岗位要求）
5+ years of experience in digital IC architecture or design supporting computer vision, machine learning or image processing use cases.
Knowledge in the field of image processing, image capture, ISP design and architecture.
Experience with methods for partitioning a solution across hardware and software, and other multi-disciplinary boundaries in a system solution.
Experience with C++ code and hands-on coding for the purpose of developing and testing HW architecture.
Experience with fixed-point arithmetic.
Experience evaluating architectural tradeoffs in speed, performance, power, area.
Experience working in the consumer electronics field.
Bachelor’s in Electrical Engineering/Computer science or equivalent work experience.
Description（岗位职责）
Author bit-accurate, implementation ready, specifications for imaging or vision cores.
Developing ISP algorithms in form of C and MATLAB code. Able to convert floating point algorithm to fixed point.
Partitioning SW-HW, deciding what to accelerate and what to keep programmable.
Architect a top down approach for an ISP unit.
Design techniques to minimize memory, for high utilization (clocks/pixels), consolidate memory fragments.
Calculating the inputs and outputs of the unit, total bandwidth, bus interfaces.
Review SoC specs and provides inputs. Develop infrastructure for ISP testing and evaluate ISPs.
