Meta AR/VR Job | Digital Design Engineer, Reality Labs (University Grad)
Job（岗位）: Digital Design Engineer, Reality Labs (University Grad)
Type（岗位类型）: Computer Vision | Design, Engineering, Hardware, Machine Learning
Citys（岗位城市）: Sunnyvale, CA
Date（发布日期）: 2022-2-25
Summary（岗位介绍）
Reality Labs (RL) focuses on delivering Meta’s vision through Virtual Reality (VR) and Augmented Reality (AR). The computer performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. Meta’s Silicon team is driving the state-of-the-art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR & VR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistor, through architecture, firmware, and algorithms.
We are growing our Machine Learning ASIC Design and µArchitecture team within RL and are seeking engineers at all levels who will work with a world-class group of researchers and engineers using your digital design skills to implement and contribute to the development and optimization of low power machine learning accelerators and state-of-the-art SoCs.
Qualifications（岗位要求）
Currently has, or is in the process of obtaining a Bachelor’s degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta.
Experience in digital design µArchitecture, RTL coding.
Experience with at least 1 procedural programming language (C, C++, Python, etc.).
Solid computer architecture experience, including CPU and CV/ML accelerators.
Experience with building Code generators and framework.
Must obtain work authorization in country of employment at the time of hire, and maintain ongoing work authorization during employment.
Description（岗位职责）
Contribute to the development of several tools related to the design, code generation, functional and performance debug of a family of custom accelerators
Contribute to scalable architecture and uArchitecture designs for low-power machine learning acceleration
Assist with Machine Learning Algorithm analysis, verification and improvement
Work across disciplines, brainstorm big ideas, build new methodologies
Additional Requirements（额外要求）
PhD in Electrical Engineering/Computer Science
Experience in ASIC design flow (Design, Verification, Integration, Synthesis)
Experience with Machine learning models, algorithms or accelerator architecture
Familiarity with PyTorch/TensorFlow or equivalent
Experience with Compilers
Experience working and communicating cross-functionally in a team environment
