Apple AR/VR Job | CAD Gate-level 3DIC EM/IR Engineer
Job（岗位）: CAD Gate-level 3DIC EM/IR Engineer
Citys（岗位城市）: Beaverton, Oregon, United States
Date（发布日期）: 2025-3-14
Summary（岗位介绍）
Imagine what you could do here! At Apple, new ideas have a way of becoming phenomenal products very quickly. Do you want to bring passion and dedication to your job? There's no telling what you could accomplish at Apple. The people who work here have reinvented entire industries with Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices - we continue to strengthen our commitment to leave the world better than we found it!
As a key member of our best-in-class CAD Group, you will be part of building innovative designs. We will apply your hands-on experience in power EM/IR analysis to develop, define and refine the methodologies and flows for gate-level, as well as transistor level designs. Major tasks will include functional static / dynamic IR analysis, scan mode IVD analysis, package and interposer model handling, 3DIC and multi die analysis, power EM analysis, SigEM, power switch modeling, design abstract and reuse for EM/IR purposes, IP / SoC level EMIR sign-off / ECO, and much more. Are you ready to join some of the world's leading engineers, and help us deliver the next generation of ground-breaking Apple products?
Qualifications（岗位要求）
Experience in EDA Tool, CAD flow and EMIR methodology.
Experience in at least one of Tcl, Python or Perl scripting languages.
Minimum requirement of BS+ 10 years of relevant industry experience
Description（岗位职责）
In this highly visible role, your primary responsibilities will include:
- Development of custom EM/IR solutions which scale with accuracy and capacity challenges.
- Streamline and automate EM/IR flow with ownership of the entire flow.
- Support and collaborate with design groups (Physical-design and integration, Circuit-design / Power / Package & System / Technology) on their EM/IR requirements for various post layout flows.
- Work side by side with EDA vendors and foundries for tool qualification, debug and enhancement.
Additional Requirements（额外要求）
Experience in some of the analysis involved in EMIR - extraction, timing, noise, simulation, physical design and verification
Ability to coordinate and drive initiatives with little to no oversight.
Excellent communication and presentation skills.
Hands on knowledge of industry leading EMIR tools e.g. Voltus, VoltusFi, RedHawk-SC, Totem.
Experience in development of large scale software in multi user, multi site environment.
Hands on experience with analysis, optimization and debugging of IR/IVD/Electromigration issues on high performance, large scale designs and silicons.
