Meta AR/VR Job | Silicon Validation Engineer
Job（岗位）: Silicon Validation Engineer
Type（岗位类型）: Hardware
Citys（岗位城市）: Sunnyvale, CA
Date（发布日期）: 2024-7-16
Summary（岗位介绍）
The Reality Labs team is building products that make it easier for people to connect with the ones they love most. We are a team of world-class experts developing and shipping products at the intersection of silicon, hardware, software, and content. The Reality Labs team seeks a Silicon Validation Engineer.
As a Silicon Validation Engineer, you will be part of the RL Silicon Validation team validating high performance silicon and leading the effort to ensure high-quality silicon delivery.
Qualifications（岗位要求）
3+ years of hands-on experience in bring-up and validation of complex SoCs.
3+ years of experience in leading silicon validation planning, execution, validation FW development, and validation signoff.
Problem solving, debug, and whiteboard skills.
Experience influencing design, DV and Post-Silicon validation teams to optimize the usage of Pre-Silicon Prototype platforms.
Experience in building silicon validation infrastructure and test automation.
Hands-on experience in using lab equipment, such as scopes, BERTs, protocol analyzers, JTAG debuggers, etc.
Experience working in a cross functional and cross site team environment.
Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
Description（岗位职责）
Responsible for SoC and E2E system validation plan development, execution and sign-off.
Identify and communicate technical risks related to the project to the stakeholders.
Plan, organize, and oversee silicon bring-up and validation activities across multiple SoCs.
Understands system HW/SW/FW component as a whole and drives test execution and debug with cross functional/PnP teams.
Lead lab debug, silicon bug repro, failure analysis, and failure report activities.
Work with cross-functional teams (i.e., architecture, IP, FW, EE, SoC, and product engineer teams) to generate validation reports for SoC and systems.
Able to work in an agile environment, changing roadmaps and be able to adapt validation plans based on changes.
Additional Requirements（额外要求）
Knowledge of ASIC design flow, silicon foundry test flow, and silicon FW development process.
Knowledge and experience in pre-silicon validation platforms (i.e., FPGA and emulation).
Background in high-speed protocols (i.e., MIPI, PCIe, USB, DDR) and hands-on experience in high-speed IO bring-up.
