Meta AR/VR Job | FPGA Design Engineer
Job（岗位）: FPGA Design Engineer
Type（岗位类型）: Engineering
Citys（岗位城市）: Sunnyvale, CA
Date（发布日期）: 2023-6-25
Summary（岗位介绍）
As the FPGA Design Engineer, you will be working within the Reality Labs FPGA development team to build advanced AR/VR rapid prototyping platforms. You will be responsible for the architecture, RTL design, simulation, verification and test/bringup of FPGA’s to meet end-to-end system requirements. This will require communicating and collaborating across functional teams to gather performance targets and use cases in order to build the right system solution. You will work closely with the systems integration and FW/SW teams for test/bringup/debug and will assist with system characterization and control/algorithm refinement. FPGA design work will require knowledge of and familiarity with all stages of the FPGA design process including simulation, floor planning, timing closure, and in-system debugging. Knowledge of Xilinx or Altera FPGA parts, their toolchains and architectural features is required.
Qualifications（岗位要求）
5+ years of FPGA design experience with Xilinx FPGA parts and Vivado design tools
Proficient in at least one hardware description language (VHDL, Verilog, SystemVerilog)
Experience with commercial HDL simulators (Xcelium/Incisive, Modelsim/Questa, VCS, or Riviera)
Hands on experience with board level testing (oscilloscope, logic analyzers)
Bachelors degree in Electrical Engineering (EE), Computer Engineering (CE) or Computer Science (CS) or equivalent experience
Description（岗位职责）
RTL development and testing for FPGA targets/platforms to support rapid prototyping
Direct contingent/contract design and test resources
Assist with algorithm analysis, verification and improvement
Collaborate in a team environment across multiple engineering disciplines
Develop component and system level performance specifications
Additional Requirements（额外要求）
10+ years of FPGA design experience with Xilinx FPGA parts and Vivado design tools
Strong System Verilog knowledge and coding skills
Experience with verification environments/methodologies
Knowledge of streaming video protocols (MIPI, AXI-Stream, etc.)
Knowledge of memory mapped bus interfaces (PCIe, AXI4-Stream, AHB, etc.)
Knowledge of FPGA emulation platforms (HAPS, ZeBu, etc.)
C/C++ programming experience
Proficient in BOTH Windows and Linux Environments
Scripting experience in TCL and Python
Master’s degree in Electrical Engineering (EE), Computer Engineering (CE) or Computer Science (CS) or equivalent experience
