Meta AR/VR Job | Digital Design and AMS Verification Engineer
Job（岗位）: Digital Design and AMS Verification Engineer
Type（岗位类型）: Hardware
Citys（岗位城市）: Remote, US | Sunnyvale, CA | Redmond, WA | Austin, TX
Date（发布日期）: 2022-9-1
Summary（岗位介绍）
Our silicon team is pushing the state-of-the-art with breakthrough work in computer vision, machine learning, mixed reality, graphics, power delivery, interconnect, displays, sensors, and new ways to map the human body. We work across the entire stack of system design, from transistors, architectures, firmware, and algorithms. Our chips will enable AR and VR devices to mix and match the real and virtual worlds throughout the day.
As a Digital Design and Analog Mixed Signal Verification Engineer at Meta, you will work with a world-class group of engineers creating high-performance and low-power custom designs for our AR/VR chips. Special focus areas will include breakthrough displays, sensors, interconnects and power. Your work will include chip-level digital uArchitecture definition of analog mixed signal chips, RTL design, collaborating with AMS designers and system engineers to ensure full verification coverage. We value excellent communication skills and strong cross-functional teamwork.
Qualifications（岗位要求）
B.S. in EE, ECE, or related field or equivalent experience
4+ years of experience in digital micro-architecture, design, verification, and synthesis
Proven track record of mass production ICs
Experience communicating clearly and working effectively in a collaborative team
Experience with design and verification best practices
Description（岗位职责）
Create high-performance and area/power efficient custom designs for Meta’s leading-edge AR chips
Shape design and verification methodology and flows to improve execution quality and efficiency
Translate product concept and design requirements into uArchitecture documents and RTL design, while conducting power, area and performance tradeoffs
Work with external vendors as well as internal design teams for all phases of silicon development
Closely collaborate with analog mixed signal designers to create behavioral models for analog blocks
Closely collaborate with analog mixed signal designers, system engineers, SoC architects, test engineers to deliver high quality uArchitecture
Design and verify RTL code in a mixed signal chip
Develop and review test plans, test benches and verification methodologies to validate analog circuit behavior along with digital components at chip level
Third party IP evaluation and integration
Developing scripts as necessary to improve productivity and reliability
Travel both domestically and internationally up to 10% of the time
Additional Requirements（额外要求）
10+ years of experience in digital micro-architecture, design, verification, and synthesis
Proven track record of project and team leadership
10+ years of experience in behavioral modeling and AMS/DMS verification for analog mixed signal chips and IPs
10+ years of experience in chip-level micro-architecture for analog mixed signal chips and IPs
Experience in UVM and utilizing analog behavioral models in UVM environment
