Microsoft AR/VR Job | Principal Lead Logic Design Engineer – SILICON TEAM

Job(岗位): Principal Lead Logic Design Engineer – SILICON TEAM

Type(岗位类型): Engineering

Citys(岗位城市): Raleigh, United States | Austin, United States

Date(发布日期): 2021-6-9


The silicon computing development team is seeking passionate, driven, and intellectually curious computer/electrical engineers to deliver premium-quality designs once considered impossible. Our team is involved in numerous projects within Microsoft developing custom silicon for a diverse set of systems ranging from traditional computing solutions to artificial intelligence and augmented reality. We are responsible for delivering cutting-edge, custom CPU and SoC designs that can perform complex and high-performance functions in an extremely efficient manner.


  • 12+ years of industry experience in logic design with leadership experience and a proven track record of delivering complex CPU or SoC IP’s
  • 10+ years working on complex CPU architectures and general computer architectures; experience with debug, trace, and profiling architecture and design at the CPU and/or system level a plus
  • 7+ years of experience with CPU micro-architecture, including knowledge of areas such as processor pipelines, load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems.

Preferred Qualifications:

  • Substantial background in debugging designs as well as simulation environment
  • Experience with digital timing analysis, multiple clocks, power, synthesis, place-n-route
  • Knowledge of verification principles, testbenches, UVM, and coverage
  • Scripting language such as Python or Perl
  • Have successfully developed and driven verification technical strategy and capabilities in a particular area
  • Demonstrated success in running cross-disciplinary taskforces
  • Proficient leadership skills
  • Proficient communication, collaboration and teamwork skills and ability to contribute to diverse and inclusive teams
  • Experience building and optimizing simulation, emulation, and/or FPGA verification environments, tools, flows, and methodologies
  • Experience with Agile software practices

Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form.

Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.




  • As a member of the Analytics and Diagnostics Logic Design team, help define and document the debug, trace, and performance profiling microarchitecture for next generation designs.
  • Represent the ADT Logic Design team as a unit lead across the core and broader SoC.
  • Participate in planning and tracking logic design, DV, and timing tasks at the CPU/project level.
  • Be responsible for the logic design/RTL entry and timing closure of multiple blocks in a high performance custom CPU/SoC.
  • Collaborate with the verification team to ensure the implementation meets both architectural and micro-architectural intent.
  • Interface with physical design, design for test, and other teams to optimize tradeoffs within the design.
  • Mentor junior team members and summer interns and cultivate a growth mindset among the team to encourage collaboration and inclusion.