Meta AR/VR Job | Silicon Prototyping Emulation Engineer
Job（岗位）: Silicon Prototyping Emulation Engineer
Type（岗位类型）: Engineering | Hardware
Citys（岗位城市）: Sunnyvale, CA | Redmond, WA | Austin, TX
Date（发布日期）: 2022-2-16
Summary（岗位介绍）
The Facebook Reality Labs team is building products that make it easier for people to connect with the ones they love most. We are a team of world-class experts developing and shipping products at the intersection of silicon, hardware, software, and content. Facebook Reality Labs team seeks a Silicon Prototyping Emulation Engineer.
Our End-to-End (E2E) proto team enables this testing by creating systems from a mix of off-the-shelf components, internal IPs and SoCs at various maturity levels, and representative mock-ups for new investigations. A successful candidate will be a FPGA/Emulation platform builder, comfortable working on boards, sensors, displays, RTL design/verification, CV/ML/Gfx algorithms, virtual platforms, OS/RTOS kernel and driver software and architectures, and who hears “its too early” as a personal challenge. The position requires a developer, able to debug and extract solutions from vague descriptions of system architecture and workloads, who also builds impactful relationships across teams to find ideas, assets and assistance to explore faster.
Qualifications（岗位要求）
Master’s degree in Computer Engineering, Electrical Engineering or similar Engineering field or BS and 5+ years Industry experience
Emulation experience on platforms such as Palladium, Veloce, or Zebu, as well as experience with compilation, debug, performance, and throughput tuning
Expertise in RTL development for FPGA/Emulation prototypes and proficient in Verilog, System Verilog (DPI, Transactors, Monitors)
Experience with UVM verification environments
Experience writing scripts using Python, Makefile, CMake
System debug experience using tools like gdb, waveform, Verdi, Simvision
Description（岗位职责）
Deliver pre-silicon validation models using system level emulation technology
Support SoC bring-up and debug activities
Develop system level testbench in C/C++ and System Verilog
Support hybrid setup (emulation model co-simulation with virtual platform) and improve emulation throughput for SW debug/development
Partner with cross-functional teams to debug issues and deploy new emulation capabilities
Work closely with product engineers, algorithm engineers, software engineers, architects and HW designers to enable pre/post-silicon validation content, quickly prototype new end user experiences and features
Additional Requirements（额外要求）
IP or system level FPGA design experience
Knowledge in SystemVerilog for design and verification, chip architecture, µArchitecture, design and UVM based design verification experience
Performance modeling and power analysis experience
Experience with IO’s such as MIPI CSI & DSI, USB, PCIE, LPDDR
Experience of dealing with ambiguity in a fast changing consumer electronics field
Experience working effectively as an individual and in a multidisciplinary team
