Meta AR/VR Job | DSP Engineer Intern, ISA Exploration
Job（岗位）: DSP Engineer Intern, ISA Exploration
Type（岗位类型）: 3D Software Engineering | Engineering, Hardware
Citys（岗位城市）: Sunnyvale, CA
Date（发布日期）: 2022-1-13
Summary（岗位介绍）
Reality Labs (RL) focuses on delivering Meta’s vision through Augmented Reality (AR) and Virtual Reality (VR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. The Reality Labs Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR and VR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistor, through architecture, to firmware and algorithms.
This internship opportunity is to work with a world-class group of researchers and engineers within the AR/VR device silicon development team of Meta Reality Labs. We are developing break-through computer vision DSP with extremely low energy consumption. AR/VR DSP executes extremely compute and memory intensive application software. While executing however, it must meet critical energy budget and heat restrictions. Therefore, DSP hardware must optimize energy usage from instruction set level to micro-architecture and logic implementation. You will participate in instruction set and micro-architecture analysis for energy optimization with various disciplined engineers and researchers during internship.
Our internships are twelve (12) to sixteen (16) weeks long and we have various start dates throughout the year.
Qualifications（岗位要求）
Currently has, or is in the process of obtaining, a Master’s degree in Computer Science or Electrical Engineering or a related field.
Interpersonal experience: cross-group and cross-culture collaboration.
Knowledge of computer architecture (pipeline and instruction set).
Programming experience (C/C++) and profiling.
Familiarity with some processor instruction set such as RISC-V.
Familiarity with vector or SIMD programming.
Must obtain work authorization in the country of employment at the time of hire and maintain ongoing work authorization during employment.
Description（岗位职责）
Exploring and analyzing one or a few DSP processor instruction set architecture (ISA) and pipeline architecture for a few core kernel codes for efficiency evaluation.
Compare the instruction set from energy efficiency perspectives and identify the gap of instruction sets for energy optimization.
Exploring energy efficient instruction set and/or pipeline architecture alternatives including customization/specialization to analyze how the gap can be filled in.
Additional Requirements（额外要求）
Knowledge of compiler optimization.
Familiarity with energy estimation of processor.
Familiarity with Script language such as Python.
Familiarity with logic design (Adder, multiplier, floating-point etc.).
Intent to return to degree-program after the completion of the internship.
