Meta AR/VR Job | Pervasive IP Manager, Facebook Reality Labs
Job（岗位）: Pervasive IP Manager, Facebook Reality Labs
Type（岗位类型）: Hardware
Citys（岗位城市）: Sunnyvale, CA | Redmond, WA | Austin, TX
Date（发布日期）: 2022-1-7
Summary（岗位介绍）
Facebook looks to bring scale to how we implement everything. For silicon, scaling requires that we do the seemingly impossible: deliver highly optimized application-specific heterogeneous SoCs using standardized components. This pervasive IP defines our approach to integration, privacy, compression, performance and power optimization, telemetry and debug, and shared memory control. Our pervasive IP team is responsible for the configurable NoC, power control, security, compression, memory, and debug generators that teams use to assemble our domain-specific accelerators and the overall SoC. A successful candidate will be a hands-on leader with detailed understanding of SoC architecture and microarchitecture, digital design and verification, and physical design.
Qualifications（岗位要求）
3+ years of technical leadership experience
Bachelor’s degree with 9+ years of experience or Masters with 6+ years of experience or PhD with 3+ years of experience in an engineering field
Experience managing the design and delivery of digital IP
Description（岗位职责）
Inspire and lead a team including architects, digital design, verification, and physical design engineers
Collaborate with SoC and pervasive IP architects to drive roadmaps
Deliver pervasive IP generators to internal accelerator and internal/external SoC teams to support their program execution
Balance support for existing programs against need to drive roadmaps forward for greater future impact
Support org-wide initiatives on improving design and verification methodologies
Grow team and leaders, while determining appropriate structure and managing resource sharing
Additional Requirements（额外要求）
Chip-level architecture, µArchitecture, design and design verification experience
Experience designing of on-chip power controllers
Deep understanding of on-chip interface protocols (ARM AMBA, OCP)
Experience in performance modeling and evaluation
Capable of dealing with ambiguity in a fast changing consumer electronics field
Results oriented, self-motivated, proactive with demonstrated creative & critical thinking skills
Skilled in design and verification using SystemVerilog and automation languages such as Python
