Meta AR/VR Job | CAD and Methodology Engineer Intern

Job(岗位): CAD and Methodology Engineer Intern

Type(岗位类型): Computer Vision | Engineering, Hardware

Citys(岗位城市): Sunnyvale, CA

Date(发布日期): 2021-12-31

Summary(岗位介绍)

Reality Labs (formerly Facebook Reality Labs) focuses on delivering Meta’s vision through Virtual Reality (VR) and Augmented Reality (AR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. The Reality Labs Silicon team is driving the state-of-the-art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR & VR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, firmware, and algorithms. We are growing our ASIC Design and µArchitecture team within AR Silicon and are seeking engineers at all levels who will work with a world-class group of researchers and engineers using your digital design skills to implement and contribute to the development and optimization of low power machine learning accelerators.

The CAD Methodology Team is responsible for defining, enabling, and supporting design and verification products and processes used by various ASIC development teams within Facebook. This includes a collection of configurable hardware IP, a suite of software tools around those IP, and support and documentation of best practices for their usage.

This internship involves planning, design, and implementation of features in the python back-end data model that is used by various hardware generators as well as front-end applications. These will be/are used heavily by various ASIC design groups within Meta. The position requires quickly getting up to speed with the frameworks of the generator’s data model, then implementing various features based on a set of requirements.

Our internships are twelve (12) to sixteen (16) weeks long and we have various start dates throughout the year.

Qualifications(岗位要求)

Currently has, or is in the process of obtaining, a Bachelor’s degree in Computer Science or Electrical Engineering, or related field

Must obtain work authorization in the country of employment at the time of hire, and maintain ongoing work authorization during employment

Experience with object oriented programming principles and software design patterns

Experience in Python programming and basic shell scripting

Description(岗位职责)

Develop tools to support RTL Generation

Develop tools and methodology to accelerate RTL and Design Verification

Develop tools and methodology to drive the chip-level integration process

Develop tools and methodology to support test program development, chip validation and chip life until production maturity

Automate flows to enable FPGA engineers to perform early prototyping

Develop infrastructure to improve tool performance

Additional Requirements(额外要求)

Currently has, or is in the process of obtaining, a Master’s degree in Computer Science or Electrical Engineering, or related field

Intent to return to a degree-program after the completion of the internship/co-op

Experience with developing Python software in a production environment

Experience in RTL coding, synthesis and/or SoC Integration

Experience with Hardware Silicon

Some experience with web application frameworks (e.g. Visual Studio Code, Eclipse)

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