Meta AR/VR Job | OLED Circuit Design & Process Engineer
Job（岗位）: OLED Circuit Design & Process Engineer
Type（岗位类型）: Hardware
Citys（岗位城市）: Sunnyvale, CA | Redmond, WA
Date（发布日期）: Before 2021-12-14
Summary（岗位介绍）
At Facebook AR/VR Hardware, we’re developing the future of Portal, Virtual Reality (VR) and Augmented Reality (AR) products. As an OLED Circuit Design Engineer, you will be a member of our Display and Optics organization, taking a lead in display panel architecture to set the technical goals, lead the development of leading-edge technologies and designs, and work with the current and evolving ecosystem to provide differentiating capabilities to our HW platforms. You will be part of a tight-knit group of highly talented engineers at the forefront of the innovation for AR/VR and portal products.
Qualifications（岗位要求）
B.S degree in Electrical Engineering, Material Science or Engineering, Physics or equivalent industry work experience
5+ years of experience in the semiconductor industry
Experience with production of silicon products
Experience with communication skills
Description（岗位职责）
Partner with internal and external teams to develop uOLED displays based on silicon chips with specific process lines
Design and optimize uOLED circuit and layout within small pixel/cell pitch
Design whole uOLED border circuit floor plan and power routing
Lead fab to develop uOLED display silicon process and transfer existing silicon technologies in and out of various process lines
Design testing structures for process integration and process module development
Process control monitor (PCM) statistical analysis to optimize device structure and process module
Design rule validation and optimization for uOLED display specifically silicon processes and devices
Support failure analysis to improve defect rate, yield and process quality
Ability and willingness to travel up to 20%
Additional Requirements（额外要求）
M.S degree in Electrical Engineering, Material Science or Engineering, Physics or equivalent industry work experience
Experience with transistor level design and verification of key analog blocks, including ADC/DAC, PLL, LDO, temperature sensor, OPAMP
Experience with Cadence design environment and mixed-mode verification
Experience in CIS and low-noise analog design
Experience with high voltage or mixed-voltage analog IC design
Experience with block level and chip level analog layout
Experience on analog layout platforms such as Cadence or Mentor and full set of layout verification tools including LVD/DRC checking tools
Experience with RC delay, IR drop, coupling capacitance, electro migration, ESD and latch up
Experience with design and evaluation of physical and electrical design rule test structures
Experience with layout edit software, experience with statistical data processing software, experience with device and process TCAD simulation tools
Experience with Bipolar, CMOS, Depletion MOS, CMOS Image Sensor (CIS), Non-Volatile Memory (NVM), High voltage CMOS
Experience with back-end processing experience such as wafer dicing, wire bonding, etc.
