Meta AR/VR Job | HW/SW Co-Design Engineer Intern, DSPs
Job（岗位）: HW/SW Co-Design Engineer Intern, DSPs
Type（岗位类型）: 3D Software Engineering | Engineering, Hardware
Citys（岗位城市）: Sunnyvale, CA
Date（发布日期）: Before 2021-12-14
Summary（岗位介绍）
Reality Labs (FRL) focuses on delivering Meta’s vision through Augmented Reality (AR) and Virtual Reality (VR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. The Reality Labs Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR and VR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistor, through architecture, to firmware and algorithms.
This is an opportunity to work with a world-class group of researchers and engineers within the AR Silicon. You will use your algorithm, system design and computer hardware and software skills to explore different solutions for an efficient programmable hardware accelerator design methodology. This is a challenging problem and will cover multiple research areas such as data movement fabric, mapping algorithms, designing power and area efficient custom tiny DSPs, bandwidth analysis, PPA analysis and many more innovative concepts which eventually make such a design possible. This is a cutting edge applied research, especially for the high compute, low power AR glasses which needs to deliver exceptional user experience with a tight area and power budget.
This is a 12-week internship with various start dates throughout the year.
Qualifications（岗位要求）
Currently has, or is in the process of obtaining, a Master’s degree in Computer Science, Electrical Engineering, or related field
Must obtain work authorization in the country of employment at the time of hire and maintain ongoing work authorization during employment
1+ year of experience in software design and programming in C/C++
1+ year of experience in RTL development
Knowledge of computer architecture
Knowledge of hardware design simulation tools
Interpersonal experience: cross-group and cross-culture collaboration
Description（岗位职责）
Research fixed function hardware accelerator micro architecture and custom vector processors
Develop C-ref model for next generation programmable hardware accelerators
Work with architects, algorithm developers and software engineers in defining the best solutions for programmable hardware accelerators
Define detail design specification for interfacing the hardware accelerator with programmable vector DSP and memory fabric
Study the possibility of resource sharing between complex programmable hardware accelerators in different computer vision compute verticals
Additional Requirements（额外要求）
Currently has, or is in the process of obtaining, a PhD in Computer Science, Electrical Engineering, or related field
Familiar with hardware acceleration design, implementation, and latency/area trade-off
Knowledge of microprocessor/DSP pipeline and memories
Familiarity with high performance software kernel development for customized ISA
Familiarity with code profiling and debug tools
Intent to return to degree-program after the completion of the internship
