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Meta AR/VR Job | Silicon Performance Architect Intern (PhD)

Job(岗位): Silicon Performance Architect Intern (PhD)

Type(岗位类型): 3D Product Design | Engineering, Hardware, Research

Citys(岗位城市): Sunnyvale, CA

Date(发布日期): Before 2021-12-14

Summary(岗位介绍)

Reality Labs (RL) focuses on delivering Meta’s vision through Augmented Reality (AR) and Virtual Reality (VR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. The Silicon Team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR and VR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistor, through architecture, to firmware and algorithms.

We are seeking an intern to carry out performance modeling and architectural exploration of silicon for computer vision. In this role, you will partner with architects and chip designers. We expect that you have experience in building performance models and exposure to heterogeneous hardware architectures.

Our internships are twelve (12) to sixteen (16) weeks long and we have various start dates throughout the year.

Qualifications(岗位要求)

Currently has, or is in the process of obtaining, a Ph.D. degree in Computer Science or Electrical Engineering in the field of Computer Architecture or a related field

Must obtain work authorization in country of employment at the time of hire, and maintain ongoing work authorization during employment

Experience in computer architecture through coursework

Experience in software design abilities with experience in C++

Experience in performance modeling and architectural exploration methodologies

Experience in hardware power, performance and area trade offs

Description(岗位职责)

Carry out performance & power architecture exploration through detailed modeling and analysis of one or more of the following functions/components: customer compute components, shared interconnect in a heterogeneous, multi-agent system, and shared cache/memory subsystem in a heterogeneous multi-agent system

Understand the tradeoffs between general purpose and custom compute mechanisms

Understand the data flow paths, working set sizes, access patterns of different general purpose vs. custom compute components

QoS, latency and throughput analysis for heterogeneous platforms consisting of multiple agents with competing resource requirements

Additional Requirements(额外要求)

Intent to return to degree-program after the completion of the internship/co-op

Experience in the analysis and exploration of heterogeneous multi-agent platforms

Research or industry experience in computer architecture and performance modeling

Demonstrated ability to tackle and solve challenging architectural problems

Experience with computer vision or imaging algorithms/workloads

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