Meta AR/VR Job | Digital Design Engineer
Job（岗位）: Digital Design Engineer
Type（岗位类型）: Hardware
Citys（岗位城市）: Sunnyvale, CA
Date（发布日期）: 2024-10-30
Summary（岗位介绍）
Meta’s mission is to give people the power to build community and bring the world closer together. Our global teams are constantly iterating, solving problems, and working together to empower people around the world to build community and connect in meaningful ways. Together, we can help people build stronger communities — we're just getting started.
Reality Labs (RL) focuses on delivering Meta's vision through Virtual Reality (VR) and Augmented Reality (AR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. Reality Labs Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR & VR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, firmware, and algorithms.
We are growing our Graphics & Display ASIC Design and µArchitecture team within RL and are seeking engineers at all levels who will work with a world-class group of researchers and engineers using your digital design skills to implement and contribute to the development and optimization of low power rendering hardware accelerators and state-of-the-art SoCs.
Qualifications（岗位要求）
Knowledge of Physical Design and Low power implementation
Experience in IP Silicon development
Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
8+ years of experience as a Hardware Design Engineer for production silicon shipped in volume
Experience in digital design µArchitecture, RTL coding
Experience with at least 1 procedural programming language such as C, C++, or Python
Description（岗位职责）
Contribute to ASIC digital µArchitecture and design for low-power rendering hardware accelerator
Assist performance/power analysis of the design and help meet the power and performance targets
Work with architects to map algorithms onto the hardware
Support hand-off and integration of blocks into larger SOC environments
Work across disciplines, brainstorm big ideas, build new methodologies
Additional Requirements（额外要求）
Experience in SoC integration and ASIC architecture
Knowledge of microcontrollers and DSP
Experience with graphics & display algorithms or accelerator architecture
