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Meta AR/VR Job | ASIC Engineer, Infra Silicon

Job(岗位): ASIC Engineer, Infra Silicon

Type(岗位类型): Engineering +1 more

Citys(岗位城市): Menlo Park, CA

Date(发布日期): 2024-9-18

Summary(岗位介绍)

Meta is hiring ASIC Engineers within the Infrastructure organization. We are looking for individuals with experience in the entire Silicon Lifecycle to build and scale silicon for data center applications.

As an ASIC Engineer in the Silicon Lifecycle Engineering team, you will be part of a dynamic team working with the best in the industry, focused on developing and supporting innovative ASIC solutions for Meta’s data center applications. The role also involves partnering with Full Stack Software, Hardware, ASIC Design, Verification, Emulation, Pre/Post-Silicon Validation & Systems teams to deliver reliable and performant silicon to our applications.

Qualifications(岗位要求)

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.

5+ years of experience in hands-on SW/FW/HW Engineering / ASIC development cycles.

Proven troubleshooting, debug and analytics experience across Silicon Lifecycle.

Experience working with internal and external partners for device integration and systems development.

Experience in architecting and implementing testing infrastructure across the full silicon lifecycle.

Description(岗位职责)

Work across all aspects of silicon lifecycle, from early architecture and design inputs, to pre-silicon validation, to bring-up and post-silicon characterization to deployment in fleet, focused on application performance and reliability.

Working with end users to understand system use cases to help guide validation. Provide feedback into next generation architecture and design with insights from the production fleet to guide future improvements.

Work directly with the design & verification team to enable a comprehensive pre and post silicon test plan.

Create automation and tooling frameworks for diagnostics, performance, debugs, across bare metal and full stack systems, from early labs to data center deployments.

Develop functional, stress and performance tools for production use cases, and left shift early detection of issues.

Root-cause, resolve and remediate issues with silicon across the lifecycle of product.

Additional Requirements(额外要求)

Experience in ASIC Design, Development or Validation (Silicon bringup, validation, emulation, characterization etc).

Experience with Silicon Lifecycle for Data center applications like Video, AI/ML and Networking designs.

Experience in Python, C/C++, Verilog.

Experience with Linux systems and server systems management.

Experience with some of the following modules/domains: PCIe, Networking, Flash, Memory, CPU, GPU, DRAM (DDR4/5 or HBM).

Experience with performance and debugging tools.

Experience with revision control systems like Mercurial(Hg), Git or SVN.

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