Microsoft AR/VR Job | Principal Physical Verification Engineer
Job（岗位）: Principal Physical Verification Engineer
Type（岗位类型）: Hardware Engineering
Citys（岗位城市）: Raleigh, United States
Date（发布日期）: 2021-12-7
Summary（岗位介绍）
Microsoft’s silicon development team is seeking passionate, driven, and intellectually curious computer/electrical engineers to deliver premium-quality designs once considered impossible. Our team is involved in numerous projects within Microsoft developing custom silicon for a diverse set of systems ranging from traditional computing solutions to artificial intelligence and augmented reality. We are responsible for delivering cutting-edge SoC designs that can perform complex and high-performance functions in an extremely efficient manner.
Qualifications（岗位要求）
- 10 or more years of experience in Physical Design with a proven track record of delivering large & complex SoCs
- Experienced in newer technology nodes, 5nm/7nm experience desired
- Experience in developing Physical Verification flows for large hierarchical chips
- Industry standard tool expertise (Siemens Calibre, Synopsys IC Validator)
- Experienced in design debug (DRC, LVS, PERC, antenna, ESD_LUP, DeltaV) and fixing physical verification violations in Calibre, ICV, Innovus, and Fusion Compiler
- Chip level physical verification leadership experience, including experience driving a team to closure
- Strong programming skills in any of the following languages: Perl, TCL, Python
- Ability to collaborate and work directly with the tool vendors, and drive them to resolve tools bugs as well as implement required improvements
- Meaningful experience in exploring and defining new technology nodes settings, and working with various technology teams on the actual node limits
- Process Design Kit (PDK) knowledge and experience with Calibre/ICV deck setup and execution
- Strong communications skills
- Strong scripting skills toward flow customization and efficiency
- Outstanding technical problem solving and debugging ability
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form.
Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.
Description（岗位职责）
In this role you will:
- Help define and implement next generation AISC SoC designs.
- Debug and lead other engineers on DRC, LVS and PERC verification design closure
- Be responsible for physical verification of one or more large blocks, including the full SoC, as well as driving flow development in advanced nodes.
- Collaborate with RTL, DFT, Circuits, SoC and Technology teams to optimize tradeoffs within the design and ensure high quality results.
- Participate with internal and external tool vendors to determine and drive optimal solutions across the physical design flow.
- Utilize scripting skills to write and customize tool flows to maximize design efficiency and productivity.
