Meta AR/VR Job | Silicon Validation Engineer
Job（岗位）: Silicon Validation Engineer
Type（岗位类型）: Hardware
Citys（岗位城市）: Sunnyvale, CA
Date（发布日期）: 2024-7-15
Summary（岗位介绍）
The Reality Labs team is building products that make it easier for people to connect with the ones they love most. We are a team of world-class experts developing and shipping products at the intersection of silicon, hardware, software, and content. The Reality Labs team seeks a Silicon Validation Firmware Engineer.
As a Silicon Validation Firmware Engineer, you will be part of the End-to-end (E2E) System Prototyping and Validation team at RL Silicon. Your work will focus on silicon validation of ARVR chips in an E2E system context.
Qualifications（岗位要求）
Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta.
Experience writing FW flows and custom scripts using C/C++, Python
System debug experience using tools like Lauterbach, gdb, or similar
Knowledge in chip architecture, µArchitecture, or design verification experience
Description（岗位职责）
Develop test plans and verification environments for IP/SoC/System-level flows using the Pre-Si systems
Write C/C++ applications to verify the SoC model against architectural specifications, able to debug through layers of SW applications to RTL FSDBs
Map Protocol Checkers, RTL assertions from SoC UVM models to Emulation and FPGA prototypes
Enable product-level user scenarios on the Pre-Si platforms and generate data for Power & Performance of different IP Blocks
Bring-up and integrate pre-silicon platforms for SW/FW activities
Validate Cross IP datapaths, support SoC bring-up and Post-Si debug activities
Work closely with product engineers, algorithm engineers, software engineers, architects and HW designers to enable pre/post-silicon validation content, quickly prototype new end user experiences and features
Additional Requirements（额外要求）
Understanding of modern CPU architecture, memory subsystems, Cache hierarchies, SoC integration flows and UPF based power management
Solid understanding of SoC architecture and Pre-Si Systems with a track record of enabling full verification cycles of complex SoCs (involving Graphics, CPU and DSP Cores)
Experience with Hardware Security IPs, Secure Hardware design for Embedded Systems
Understanding of of Startup code, Linker Scripts, Assembly code
Performance modeling and power analysis experience
Experience with IO’s such as MIPI CSI & DSI, USB, PCIE, LPDDR
Experience of dealing with ambiguity in a fast changing consumer electronics field
Experience working effectively as an individual and in a multidisciplinary team
