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Meta AR/VR Job | ASIC Engineer, Architecture

Job(岗位): ASIC Engineer, Architecture

Type(岗位类型): Engineering

Citys(岗位城市): Sunnyvale, CA

Date(发布日期): 2023-5-28

Summary(岗位介绍)

Meta is seeking an ASIC Engineer, Architecture to join our Infrastructure organization. Our servers and data centers are the foundation upon which our rapidly scaling infrastructure efficiently operates and upon which our innovative services are delivered. By holding this role, you will be an integral member of an ASIC team to build accelerators for some of our top workloads enabling our data centers to scale efficiently. You will have an opportunity to work with AI/Machine Learning (ML) experts in the company, help architect state-of-the art machine learning accelerators, and contribute to modeling these accelerators. Come work and learn alongside our expert engineers to build “Green” data center accelerators.

Qualifications(岗位要求)

Bachelor’s degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.

Experience and knowledge of Computer Architecture concepts such as processor architecture, memory systems and on-chip interconnection networks.

Programming experience in C, C++ or related Object Oriented Programming.

Description(岗位职责)

Work on advanced architecture, algorithms and models targeting Machine Learning solutions.

Analyze and map data center workloads to ASIC architecture, as well as develop performance and functional models to validate the architecture.

Implement and analyze algorithms and enhanced architecture for the data center Machine Learning accelerators.

Implement various models needed for the validation of the accelerators.

Create Machine Learning kernels to analyze the ASIC Architecture, and make the architecture optimal for ML workloads.

Additional Requirements(额外要求)

Master’s or PhD degree in Electrical Engineering, Computer Engineering or related areas.

Experience driving power and performance trade-offs in ASIC Architecture.

Experience and knowledge in Machine Learning Silicon architectures.

Knowledge of Machine Learning kernel development.

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