Meta AR/VR Job | Manager, Display Mixed-Signal Silicon Architect

Job(岗位): Manager, Display Mixed-Signal Silicon Architect

Type(岗位类型): Design | Engineering, Hardware, Research

Citys(岗位城市): Remote, US | Sunnyvale, CA | Redmond, WA

Date(发布日期): 2022-12-13


Meta VR is the world leader in the design of virtual and augmented reality systems. Come work alongside expert engineers and research scientists to create the technology that makes VR pervasive and universal. Join the adventure of a lifetime as we make science fiction real and change the world.

The Display Architecture Team within the VR organization is seeking a Display Silicon Architect and Manager to lead a team of mixed-signal circuit designers and silicon architects. As a member of the Display Architecture Team, the successful candidate will be working closely with partners in the Display Panel and Module teams, as well as the SOC Architecture team to define the architecture of high-speed interfaces and pixel driving circuits of our future VR displays. In addition, the Silicon Architecture team will work closely with the Drive IC team and display vendors to deliver power and area-efficient driver ICs for our future products.

This role offers involvement in a mix of forward-looking and product-critical projects, and requires close collaboration with multiple teams within the Meta Reality Labs. The forward-looking aspects of the job require analysis of performance, cost, and risk in the presence of many unknowns for a technology that goes to market in 4-6 years. In addition, the successful candidate should articulate the results in a concise manner to the management and cross-functional leadership. Therefore, a Ph.D. degree, research background, and experience in creating technical papers are highly desirable for this role. The product-critical aspects of the job require engagement with vendors, sitting in design reviews, creating checklists, and overseeing the overall design process to sign off on the final design. Therefore, experience in leading tape outs and chips through production is necessary.


M.Sc. plus 15+ years or Ph.D. plus 10+ years experience in mixed-signal design.

2+ years of management experience.

Experience in designing high-speed interfaces.

Experience in leading tape outs and owning chips through production.

Experience in drafting academic papers, white papers, and architecture specs.

Experience in managing small teams.


Manage a team of mixed-signal circuit designers and display experts to define mixed-signal IP specs of future products.

Lead, area, cost, risk analysis of various high-speed interface and pixel driving architectures.

Articulate merits of proposals to cross-functional teams, negotiate specs and reach consensus.

Create detailed architecture specs and design guidelines for product design.

Work closely with the DDIC team to manage display vendors.

Create T/O checklists, attend design reviews, and sign off on the design.

Work closely with the Display EE team for module bring up and debug during builds.

Additional Requirements(额外要求)

Ph.D. degree in Electrical Engineering.

Experience in high-speed interface design for displays, particularly eDP.

Experience with Display Driver IC or TCON design.

Familiar with eDP specification.

Experience in panel driving circuit design.

Familiar with display pixel design.

Familiar with DSC or other display stream compression methods.