Meta AR/VR Job | Silicon Package Design Engineer
Job（岗位）: Silicon Package Design Engineer
Type（岗位类型）: Hardware
Citys（岗位城市）: Remote, US | Sunnyvale, CA | Redmond, WA | Austin, TX
Date（发布日期）: 2022-4-22
Summary（岗位介绍）
Facebook AR/VR focuses on delivering Facebook’s vision through Augmented Reality (AR) and Virtual Reality (VR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. Facebook Silicon team is driving the state-of-the-art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR and VR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistor, through architecture, to firmware and algorithms. Join the adventure of a lifetime as we make science fiction real and change the world.
We are building a competency in packaging design and technology to support the development of custom silicons for AR/VR hardware as well as to develop packaging solutions that are optimal for our device ID and system level performance.
Qualifications（岗位要求）
Bachelor’s degree in electrical engineering, mechanical engineering or equivalent experience.
5+ years experience in designing packages or modules for mobile or computing applications.
Experience working with advanced packaging tools such as Cadence APD and SiP Mentor Xpedition.
Description（岗位职责）
Perform package design for advanced custom Si comprising single-chip/multi-chip and SiP/module packaging
design feasibility studies and analyses
package design/layouts based on Si IO, SI/PI and system ID/form factor requirements.
Participate in Si/package/PCB/system co-design work collaborating with downstream system design teams and upstream Si designers to develop optimal system level solutions.
Work with internal Si, architecture and system teams and externally engaged partners, design houses and OSAT companies.
Perform design analysis and what-if scenarios for novel packaging schemes such as 2.5D/3D and heterogeneous integration to improve bandwidth, power efficiency and package form factor for next generation versions of current products.
Additional Requirements（额外要求）
Masters degree in electrical or mechanical engineering, material science or equivalent experience.
Familiarity or experience with Finite Element Modeling (FEM) of thermal and thermo-mechanical behavior of packages.
Experience working with MCAD tools such as SolidWorks, AutoCAD and interconversion of package design databases to MCAD files.
