Meta AR/VR Job | Reality Labs, ML Architecture Lead
Job（岗位）: Reality Labs, ML Architecture Lead
Type（岗位类型）: Machine Learning
Citys（岗位城市）: Sunnyvale, CA | Austin, TX | Seattle, WA | Remote, US
Date（发布日期）: 2022-2-9
Summary（岗位介绍）
Meta Reality Labs (FRL) focuses on delivering Facebook’s vision through Virtual Reality (VR) and Augmented Reality (AR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. Meta Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR & VR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistor, through architecture, firmware, and algorithms.
We are growing our ML Accelerator Architecture team within FRL. We are hiring a lead for this team that works with a set of world-class ML architects and researchers to develop full stack custom solutions for AR/VR workloads.
Qualifications（岗位要求）
PhD in electrical engineering, computer science or equivalent experience.
6+ years experience as a silicon architect.
Experience with ML models, algorithms or accelerator architecture.
Experience in either RTL coding or performance modeling.
Description（岗位职责）
Lead Machine learning accelerator architecture
Develop software tooling/methodologies for efficient design of ML accelerators
Assist with performance/power analysis of machine learning models
Work closely with system architects and product managers to enable new ML use cases
HW-SW Co-design of machine learning workloads
Work with FPGA engineers and firmware teams to perform early prototyping
Manage a team of other architects in similar job function
Additional Requirements（额外要求）
Experience with ML, graphics or computer vision accelerator.
Experience with TensorFlow, Pytorch or similar machine learning toolsets.
Experience with at least one procedural programming language (C, C++, Python etc.).
Experience in ASIC design flow (design, verification, integration, synthesis).
Experience with HW/SW co-design.
