Meta AR/VR Job | SoC Design Engineer

Job(岗位): SoC Design Engineer

Type(岗位类型): Hardware

Citys(岗位城市): Sunnyvale, CA | Redmond, WA | Austin, TX | Remote, US

Date(发布日期): 2022-1-13


Facebook Reality Labs focuses on delivering Facebook’s vision through Virtual Reality (VR) and Augmented Reality (AR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. Facebook Silicon team is driving the state-of-the-art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR & VR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistor, through architecture, firmware, and algorithms.

We are growing our ASIC SoC Design and µArchitecture team within AR Silicon and are seeking engineers at all levels who will work with a world-class group of researchers and engineers to implement and contribute to development of state-of-the-art SoCs.


3+ years of experience as a Digital Design Engineer

Experience in RTL coding, synthesis and/or SoC Integration

Experience in digital design µArchitecture

Bachelor’s in Electrical Engineering/Computer Science or equivalent experience


Contribute to scalable architecture of SoC and block level design

Drive or participate in the top-level µArchitecture definition and develop the necessary RTL

Drive or participate in the chip-level integration

Support synthesis and timing closure

Contribute to ASIC digital µArchitecture, design and verification plan

Support the test program development, chip validation and chip life until production maturity

Work with prototyping engineers to perform early prototyping

Support hand-off and integration of blocks into larger SOC environments

Assist with performance/power analysis of IPs at block and SoC level

Additional Requirements(额外要求)

Master’s degree in Electrical Engineering/Computer Science

Experience as a chip lead

Experience with machine learning, graphics, computer vision, audio, security designs

Experience in SoC integration and ASIC architecture

Experience with automated integration flows and IP-XACT

Experience with low power design and optimization

Experience with design synthesis and timing optimization

Experience with NoCs

Experience integrating microcontroller and application-type CPUs

Experience with System Verilog and at least 1 procedural programming language (C, C++, Python etc.)