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Meta AR/VR Job | Silicon Validation Engineer Intern

Job(岗位): Silicon Validation Engineer Intern

Type(岗位类型): 3D Product Design | Engineering, Hardware

Citys(岗位城市): Sunnyvale, CA

Date(发布日期): 2022-1-5

Summary(岗位介绍)

Reality Labs (formerly Facebook Reality Labs) focuses on delivering Meta's vision through Virtual Reality (VR) and Augmented Reality (AR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. The Reality Labs Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR & VR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, firmware, and algorithms.

As a Silicon Validation Intern, you will be part of the Reality Labs Silicon Validation team validating high performance silicon and leading the effort to ensure high-quality silicon delivery.

Our internships are twelve (12) to sixteen (16) weeks long and we have various start dates throughout the year.

Qualifications(岗位要求)

Currently has or is in process of obtaining Master’s degree in Computer Engineering or Electrical Engineering or a related field.

Experience debugging and whiteboard skills.

Interpersonal experience: cross-group and cross-culture collaboration.

Must obtain work authorization in the country of employment at the time of hire and maintain ongoing work authorization during employment.

Description(岗位职责)

Contribute toward SoC and E2E System Validation plan, development, and execution.

Part of the team that identifies and communicates technical risks related to the project to the stakeholders.

Understands system HW/SW/FW component as a whole and drives test execution and debug with cross functional teams.

Participate in lab debug, silicon bug repro, failure analysis, and failure report activities.

Work with cross-functional teams (i.e. architecture, IP, FW, EE, SoC, and product engineer teams) to generate validation reports for SoC and systems.

Work in an agile environment where project roadmaps may change. And be able to adapt validation plans based on changes in roadmap.

Additional Requirements(额外要求)

Experience influencing design, DV and Post-Silicon validation teams to optimize the usage of Pre-Silicon Prototype platforms.

Experience in silicon validation, execution, validation FW development.

Experience in high-speed protocols (i.e. MIPI, PCIe, USB, DDR) and hands-on experience in high-speed IO bring-up.

Knowledge of ASIC design flow, silicon foundry test flow, and silicon FW development process.

Knowledge and experience in pre-silicon validation platforms (i.e. FPGA and emulation).

Hands-on experience in using lab equipment, such as scopes, BERTs, protocol analyzers, JTAG debuggers, etc..

Intent to return to degree-program after the completion of the internship.

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