Meta AR/VR Job | DFT Engineer
Job（岗位）: DFT Engineer
Type（岗位类型）: Hardware
Citys（岗位城市）: Sunnyvale, CA | Austin, TX
Date（发布日期）: Before 2021-12-14
Summary（岗位介绍）
Facebook AR/VR focuses on delivering Facebook’s vision through Augmented Reality (AR) and Virtual Reality (VR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. Facebook Silicon team is driving the state-of-the-art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR and VR devices where our real and virtual world mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistor, through architecture, to firmware, and algorithms.
As a DFT Engineer in the newly formed Facebook DFT organization, you will actively drive DFT solutions for our custom silicon roadmap. Through this highly visible role, you will be part of the team effort interfacing with multiple disciplines, with a critical impact on getting functional high quality products to millions of customers.
Qualifications（岗位要求）
5+ years Design for Test experience on complex SoC’s including architecture specification, Implementation, test pattern development and verification
Master’s degree in Computer Engineering, Electrical Engineering or similar Engineering field or BS and 5+ years Industry experience
Knowledge about industry standards and practices in DFT, ATPG, JTAG, Memory BIST, and trade-offs between test quality and product impact (power, performance, area, schedule)
Experience with yield enhancement methods such as memory repair and in-system operation
Proficient with commercially available DFT, design and verification tools
Experience in debugging DFT patterns in simulation and on ATE
Description（岗位职责）
Work with the Silicon teams to establish DFT requirements and the DFT Architecture needed to achieve product quality goals
Develop and implement DFT features and methodologies optimized for PPAS and verified
Improve execution efficiency and QOR through flow automation and dashboard checks
Manage schedules and support internal and external cross-functional/cross-organizational engineering efforts
Support silicon bring-up, debug and ramp to production
Additional Requirements（额外要求）
Experience with running synthesis and developing STA constraints for DFT operation modes
Experience with running and debugging SDF back-annotated simulations
Experience with power-aware DFT, power delivery networks and their unique interaction with DFT architectures and implementations
Experience with Analog DFT and Analog Mixed Signal IP test methods and integration
Proficiency with programming and scripting languages such as Perl/TCL
